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CM2006

The CM2006 is available with lead-free finishing.

VGA Port Companion Circuit for Monitors

PRODUCT DESCRIPTION

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The CM2006 connects between the VGA or DVI-I port connector and the internal analog or digital flat panel controller logic. The CM2006 incorporates ESD protection for all signals, level shifting for the DDC signals and buffering for the SYNC signals. ESD protection for the video, DDC and SYNC lines is implemented with low-capacitance current steering diodes.

All connector interface pins are designed to safely handle the high current spikes specified by IEC-61000-4-2 Level 4 (±8kV contact discharge). The ESD protection for the DDC, SYNC and VIDEO signal pins is designed to prevent "back current" when the device is powered down while connected to a video source that is powered up.

Separate positive supply rails are provided for the VIDEO / SYNC signals and DDC signals to facilitate interfacing with low voltage video controller ICs and microcontrollers to provide design flexibility in multi-supply-voltage environments.

Two Schmitt-Triggered non-inverting buffers redrive and condition the HSYNC and VSYNC signals from the video connector (SYNC1, SYNC2). These buffers accept VESA VSIS-compliant TTL input signals and convert them to CMOS output levels that swing between Ground and VCC.

Two N-channel MOSFETs provide the level shifting function required when the DDC controller or EDID EEPROM is operated at a lower supply voltage than the monitor. The gate terminals for these MOSFETS (VCC_DDC) should be connected to the supply rail (typically 3.3V, 2.5V etc.) that supplies power to the transceivers of the DDC controller.


FEATURES

APPLICATIONS

  • Includes ESD protection, level-shifting, buffering and sync impedance matching
  • VESA VSIS Version 1 Revision 2 Compatible Interface
  • Supports Optional NAVI signalling requirements
  • 7 channels of ESD protection for all VGA port connector pins meeting IEC-61000-4-2 Level 4 ESD requirements (±8kV contact discharge)
  • Very low loading capacitance from ESD protection diodes on VIDEO lines (3pF maximum)
  • Schmitt-triggered input buffers for HSYNC and VSYNC lines
  • Bi-directional level shifting N-channel FETs provided for DDC_CLK & DDC_DATA channels
  • Backdrive protection on all lines
  • Compact 16-lead QSOP package
  • RoHS-compliant, lead-free finishing
  • VGA and DVI-I ports in:
    - Monitors
    - TVs

DATA SHEET(S)

 Part Number Datasheet
 CM2006-02QR Data Sheet (PDF - 282.2 KB)
Last Revision Date: 2009-10-16 — Issue A

PACKAGING, FINISHING & STATUS INFORMATION

Part Number PackageLead-Free
Finishing
Status
CM2006-02QR QSOP-16Active
Include CM2006 devices with OBSOLETE status

Status Key

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